Back in April, I wrote about how Atrenta - an ARM Connected Community Partner - was helping to tame the SoC design problem with early power, performance and area or ePPA technology.  ePPA holds great promise…

During the ARM® -Mentor® seminar Tuesday, July 17, the nearly 100 attendees heard about the goals and ambitions of the long-term partnership between Mentor and ARM to improve testing of ARM cores…

At just under 14 minutes, with a top speed of 300km/hour, my commute to an airport on public rail transportation has never been faster! I wasn't on the high-speed public rail systems that typically come…

It's often said that as one gets older, time appears to pass faster and faster. As proof of that it seems only yesterday that I had a full head of hair and ARM launched big.LITTLE. In fact it's been…

Bringing test patterns for your ARM core or other core-level blocks together for chip-level test of your SoC can present significant challenges. Whether your core-level test patterns are scan-based or…

If you've watched any sporting event on television lately, you've seen the pressure put on referees and umpires.  They have to make split-second decisions in real-time, having viewed ultra-high-speed action…

It is entirely appropriate that ARM will announce technical details of its latest hard macro product, the Cortex™-A15 MP4 Hard Macro for TSMC 28HPM node at COOL Chips XV, the IEEE Symposium on Low…

Power, performance and area or "PPA," as it is called, has become a universally interesting topic to system-on-chip (SoC) designers around the world.  Atrenta -- an ARM Connected Community…

Now available design strategies and documentation to ease the migration to an ARM platform - From one programmer to another.  You could say I'm an "Acorn boy" - I cut my programming teeth on personal computers…