How to get the most out of the memory interface  The choice of DDR memory is a key factor in determining the cost and power of the smartphone. Low cost smartphones typically use a single 32-bit memory…

ARM products in server and networking? Yes, it’s happening and AMBA® 5 CHI is a big part of making that happen. The AMBA 5 CHI protocol enables the latest ARMv8 architecture Cortex®-A50…

ARM® AMBA® 5 CHI Memory Controllers work in concert with AMBA 5 CHI interconnects to provide controls to optimise data flows between many processors and the DDR memory.  In this blog I am going to tell…

ARM Big.LITTLE processing addresses one of today's most significant challenges: extending consumers' always on, always connected mobile experience with both improved performance AND longer battery life…

Following on from two earlier articles (Navigating the Cortex Maze and ARMv6-M vs ARMv7-M - Unpacking the Microcontrollers), you might be interested in a new piece on the ARMv7-A architecture and Cortex…

Recently, I wrote an article called “Navigating the Cortex Maze” (Navigating the Cortex Maze) That was intended as an easy way-in to the ARM processor range, covering Cortex-A (architecture…

Fact: The ARM architecture is the most widely licensed 32-bit embedded instruction set architecture in the industry. That fact makes the ARM Instruction Set Architecture (ISA) incredibly important to…

In the fast-paced technology world we are used to hearing about improvements from one product generation to the next. In the past, we have looked in great detail at the various different metrics used to…

I thought I'd post a short blog post about commonly asked questions on AMBA 4 ACE and system coherency.What does ACE mean?ACE is the "AXI Coherency Extensions" introduced with the AMBA 4 specification…