Introduction Deep in the darkest depths of ARM’s Cambridge campus reside a small team of engineers whose job it is to envision and create forward thinking technology demonstrations based on ARM. That…

This blog will cover the basics of interrupt latency, and what users need to be aware of when selecting a microcontroller with low interrupt latency requirements.

ARM® partner Deepoon recently launched a brand new, all-in-one virtual reality headset powered by ARM. Based on an Exynos 7420 chipset, the Deepoon M2 features an octa core ARM Cortex®-A57 & Cortex-A53…

This blog was written by paulblack to explain some of the new features in DS-5 Development Studio v5.24.In DS-5 v5.24, we’ve made changes to some of the debugger views. These changes are mostly designed…

Following on the heels of a recent post highlighting trade-offs in HDI technology and layer count of a single-board versus a som solution and how that drives bare_board costs, we wanted to take the next…

IntroductionIn ARM® Cortex®-A class CPUs, the Memory Management Unit (MMU) and Operating System (OS) work together to protect address spaces. A process running in unprivileged mode has its own virtual…

“It’s interesting to think you have something in your hands that you don’t quite understand.” You could apply that sentiment to inventions throughout history. You could apply that…

Overview of stack size requirement estimations in Arm Cortex-M based applications.

[note] This is an English translation edition of my article which appeared on the Interface magazine issued by the CQ publishing. I'm sorry for my poor English.[1] Background of the strongest Cortex-M4…