• Enabling I-cache resulting into an abort
    Note: This was originally posted on 17th November 2010 at http://forums.arm.com Hi, I am working on a bootloader for Cortex-A8 based on the open source bootloader U-Boot v2010.06. I have a 2 stage approach...
  • Enabling I-cache resulting into an abort
    Note: This was originally posted on 17th November 2010 at http://forums.arm.com Hi, I am working on a bootloader for Cortex-A8 based on the open source bootloader U-Boot v2010.06. I have a 2 stage approach...
  • ARM Cortex A9 - Enabling/Disabling the Caches
    Hello, I'm developing a custom bootloader for NXP i.MX6 DualLite (ARM Cortex A9). In this bootloader, I need to initialize ~50 MB of RAM to Zeros, this part executes really fast after enabling Caches...
  • ARM Cortex A9 - Enabling/Disabling the Caches
    Hello, I'm developing a custom bootloader for NXP i.MX6 DualLite (ARM Cortex A9). In this bootloader, I need to initialize ~50 MB of RAM to Zeros, this part executes really fast after enabling Caches...
  • Enable/Disable L2 cache on ARM Cortex-A72
    Hi all, Is it possible to Enable/Disable L2 cache on ARM Cortex-A72? If yes could you please guide on how to do that? Thanks a lot.