• To generate a FIQ from ARM GIC apart from setting GICC_CTLR.FIQEn what else needs to be configured?
    I'm just trying to generate an FIQ from GIC .All the interrupts are by default grouped to Group0 and apart from setting FIQEn trying to understand what else needs to be configured..
  • GICR_WAKER.ChildrenAsleep conditions to go to 0x0, post PE power-up
    As stated in GIC v3 Arch: After powering up a PE, software must set ProcessorSleep to 0 and wait until ChildrenAsleep == 0. Can you please also state the conditions for GICR_WAKER.ChildrenAsleep to...
  • GPIO: Displaying currency exchange rate on 7-segment indicators
    About the Application This tutorial is dedicated to the control of 7-segment LED indicators by means of a single Tibbit #00_1 and several shift register ICs (daisy-chained together). 7-segment indicators...
  • read transfers
    In read transfres how the slave indicates the transaction is over?
  • AXI transfer
    Consider Data interface is 64 bit. It is Write transfer. AXI master need to transfer 11 bytes and starting address is 0. Anyone suggest which one is a valid among below mentioned two scenarios. Scenario...