• SWD physical structure
    What is SWDIO pin hardware structure? I want to know which is a push-pull or a n-channel open-drain with pull-up. I can't find the maximum of SWD interface frequency. Please, let me know the above questions...
  • Other core's view after writing ICC_SGI1R_EL1 to trigger SGI
    For example, the codes are executed in core0. codes: (1) send SGI to core1 ICC_SGI1R_EL1 (2) set(a) = 1 i) Then the core1 will first see the irq or the change of variable a? ii) If I add ISB...
  • JTAG/SWD and entering debug monitor
    How does a JTAG/SWD debugger know when BKPT is executed? My guess is that BKPT triggers entry to debug monitor and entering debug monitor sets something in the debug port, but what, and how does a debugger...
  • Issue in writing a data in PMU register
    Hi, Following are the query regarding the ARM Cortex A7 MP Core. In ARM Cortex A7 MP Core,facing a issue in memory mapping the registers and accessing the registers by read and write operations. By means...
  • Basic register write data changes in assembly when NOP added
    Hi all, I am doing a basic register read/write on a custom SoC with ARM Cortex A53 and many other peripherals added with an AXI fabric integrated. Using the below code in assembly after bringing up...