• burst-based transactions on AXI
    Hi, I'm confusing with burst transaction in AXI. there is one key feature in AXI spec.... > "burst-based transactions with only start address issued" How can we understand this point? ...
  • Readunique and cleanunique transactions in ACE protocol
    In case of readunique transaction cache line is copied into the initiating master's cache(whether it is clean or dirty) and invalidated in snooped master's cache and then store operaation is performed...
  • When Wrapping happens in AXI?
    Hi Forum, I cannot understand when address is being wrapped in WRAP burst. In my example, the WRAP condition never happens in other words, during BURST operation address always remains small than...
  • Is there a limit for AXI4 outstanding transaction?
    Hi all! I'm working on an avalon to axi4 master writing bridge module. In many cases,I need to assert a large number of awvalid continually for writing efficiency(for instance, a frame of 4K video data...
  • AXI4 Burst Transactions
    I am new to AXI4 protocol. I would like to know how many clock cycles are required to complete a AXI4 burst write transaction. Eg. Burst length- Two , Burst size 16 bytes. Please give me answers...