• AXI protocol - Unaligned data transfer definition
    IN axi,what is unaligned data transfer??
  • AXI narrow read with unaligned address
    Hi, I have a question about the correct behavior when performing a narrow read with an unaligned address; consider the following scenario: - 32 bit data bus - address x0001 - length 0 (1 beat...
  • AXI protocol
    Note: This was originally posted on 30th December 2007 at http://forums.arm.com Can anyone tell me the exact explanation and differnce between out of order completion and write data interleaving  in detail...
  • Is during AXI unaligned transfer not all WDATA bits used?
    Dear Forum, Can you please confirm one thing. When we have un-aligned transfer, do some of WDATA bits not used during that transfer? For example, in the below unaligned transfer WDATA[7:0] are not...
  • Introduction to AXI Protocol: Understanding the AXI interface
    When part of a team, your group can become more capable than a single individual, but only if your team can work together and communicate effectively. Having members of a group talk over each other leads...