• About two port SRAM compiler in tsmc 0.13um ?
    Hi,     I only found signle and dual-port sram compiler in tsmc 0.13µm process IP Library,.     Doesn't ARM support the two port SRAM compiler for tsmc 0.13µm process?     Thank you
  • Using UART to write to SRAM
    Hi All, I am using UART to receive values and then write those values to SRAM. I am using the Texas Instruments Stellaris LM4F120 board. For this purpose, I am using the memcpy() function to write the...
  • RMW operation on SRAM via AXI
    I am implementing Read Modified Write on SRAM through AXI. What is the role of awsize and wstrbe? Say data width is 64 bits, and awsize is set to support 64-bits, but the underlying wstrbe are only...
  • How to use CCM SRAM for Cortex-M4?
    How to compile in gcc 4.9.3 for CCM SRAM usage?
  • SRAM for Cortex M0 -- Does It Need to Support Byte write?
    For the SRAM with Cortex M0, does it need to support byte write? What restrictions do I have with Cortex M0 if the SRAM only support 32-bit write?