• about affinity routing in GICv3 (can't understand a figure in the document)
    I was reading the document "GICv3_Software_Overview_Official_Release_B.pdf". In page 8, I see this figure. it shows for each GIC version, how the modes are set by the registers for each exception...
  • New online training course - Arm GICv3/v4 Essentials
    We are very pleased to announce a new online training topic – Arm GICv3/v4 Essentials . About the course This course brings the subject of Arm’s Generic Interrupt Controller (GIC) architecture specification...
  • GICR_WAKER.ChildrenAsleep conditions to go to 0x0, post PE power-up
    As stated in GIC v3 Arch: After powering up a PE, software must set ProcessorSleep to 0 and wait until ChildrenAsleep == 0. Can you please also state the conditions for GICR_WAKER.ChildrenAsleep to...
  • To generate a FIQ from ARM GIC apart from setting GICC_CTLR.FIQEn what else needs to be configured?
    I'm just trying to generate an FIQ from GIC .All the interrupts are by default grouped to Group0 and apart from setting FIQEn trying to understand what else needs to be configured..
  • Interrupt Routing flow in GICv3
    Hi all, GIC is quite an interesting topic and interrupt controller can also be said as an most important module in an SoC that routes interrupts to the Processor. We know that there different interrupt...