• MPU
    Hi Using STM32f4 Board, I am enabling MPU in between any code (simple program) always causing memory management fault on debugging fault that ( IACCVIOL) bit is set, It means Attempting...
  • Changing prio of running IRQ triggers hardfault
    Hello I've a question regarding the NVIC on Cortex M4 devices. Up until today I was under the impression that changing the priorities of a running interrupt isn't an issue in the ARMv7-M architecture...
  • Forced Hardfault (INVPC) Exception Error
    Using ARM coretx-M chip set Getting random INVPC hard fault exception error, while running iperf tool for measuring n/w throughput. Hard fault reg: 0x40000000 xPSR: 0x01000000 PRIMASK: 0x00000001...
  • hardfault error
    Hi! I'm getting hard fault error and I cannot figure out why. Can anybody point me to the right direction? The architecture is Cortex-M4 with stack size of 0x3000. It doesn't seem to be stack overflow...
  • Usefulness of MPU in a non-OS system
    Hi. We are developing a product which has to achieve some safety requirements. The system is quite simple, non-OS, running in a Privileged mode only on a Cortex-M4. I would like to implement a Memory...