• Hard Fault in cortex m4
    Hello All, Good Morning! I am working on Cortex m4. I have read following about hard fault , "Bus Fault: detects memory access errors on instruction fetch, data read/write, interrupt vector fetch, and...
  • hard fault with Cortex M1
    Note: This was originally posted on 24th December 2008 at http://forums.arm.com Hi all, I am developing firmware on Cortex M1 on Actel fusion FPGA.I have built the design that has sram at 0x0 location...
  • Hard Faults and MemManage Faults in Cortex m3/m4
    I wrote a simple program, where I am writing to an illegal memory location. Writing in an illegal Memory location generates a MemManage fault. And if MemManage is not enabled, HardFault in generated....
  • Cortex-M3 Hard Fault - find cause?!?!?!?
    Hello all, I'm new to the ARM platform and I'm having a problem discovering why my code is generating a Hard Fault. My hardware is an mbed platform board with the NXP LPC1768 processor. The code...
  • Hard fault : Cortex M0+ platform.
    Hello, Micro-Controller platform: STM32L0x1 Environment: Bare-Metal (No OS) Brief description of the problem: From interrupt context, we are trying to copy information received to EEPROM. Soon...