• cortex-m3 pipeline stages, branch prediction
    Hello, Doing some research for master thesis, I've read several documents about ARMv7-M / Cortex-M3 includung reference manuals and books such as Joseph Yiu's "Definitive Guide to Cortex-M3" and Trevor...
  • xPSR change itself when branching
    I am writing an embedded operating system targeting arm cortexm 4... I am working on context switching .. I can switch the kernel into user program and go back. but SVC call seems not work well. syscall...
  • About FPU pipeline of Cortex-M7
    Hello experts, The Cortex-M7 Lecture is opened on APS (ARM Partner Success) Site. Also, #4 and #5 are described the details of Cortex-M7 pipeline. However, I cannot understand the following parts of the...
  • Replacing branch-instruction with address assignment to PC
    Hi, in a thumb-assembly file (my toolchain is gcc 4.8), I want to replace a branch with address assignment to the program-counter. So instead of: b lbl I want to have something like: pc = address(lbl...
  • How cortex-M4 handles data hazard situations in the pipeline?
    Hello to all, Since I am working on ARM Cortex-M4, I would like to know about the handling of the hazard situations (especially the RAW, WAR and WAW hazard situations) in the pipeline. Is the processor...