• VTOR: offset address configuration
    Core: Cortex-M4F Do I need to configure vector table offset address to 0xnnnn_n 000? In case of 0x3080(Flash region), the program jump to unexpected code. I think it is caused by mismatching between vector...
  • Interruptible-restartable instructions and Others
    Hi, As I have found in: Cortex-M0+ Devices Generic User Guide: 2.1.3. Core registers There is information about instruction behaviour during interrupts: "Interruptible-restartable instructions The interruptible...
  • Interrupt vector calculation with VTOR.
    Hi Cortex-M architects or experts, I have a question. Is the interrupt vector calculated by not ADDed with VTOR but ORed with VTOR? There is a post in the Freescale Kinetis Community as "Vector Table...
  • Question Related to Interrupts
    Question:  When a processor is interrupted when it is executing a Jump instruction, what goes on the stack - the address of the instruction next to jump or the address where the jump is supposed to go...
  • SMMU related question.
    when reading  ARM® System Memory Management Unit Architecture Specification, I noticed that there is a saying in about chapter 5, the last section named <cache maintenance operations>.           In SMMUv2...