• SWD issue in Cortex-m0
    We are using Cortex-M0 DesignStart Pro to design MCU. When we use SWD to download grogram to flash in FPGA(Cortex_m0 mcu inside), we cannot to connect keil with FPGA, and Keil shows:" Could not stop Cortex...
  • Cortex-M0+ JTAG state doesn't reset in simulation when tying nTRST high and trying synchronously reset through TMS
    Hi, According to the Cortex M0+ integration guide: "nTRST can be tied HIGH when a synchronous JTAG reset is provided through the TMS pin." However in simulation the JTAG state is constant 'X' and...
  • SWD: Cannot connect to MEM-AP on Cortex-M0 Designstart Eval
    I am evaluating the SWD-Port of the Cortex-M0 Designstart using the obfuscated component of the Eval distribution AT510-MN-80001-r2p0-00rel in a Modelsim Simulation. For that purpose I composed a minimal...
  • does ARM Cortex-M0 DesignStart support SWD debugger?
    I am studying the ARM Cortex-M0 DesignStart. I found there are debug port SWDIOTMS and SWCLKTCK in the port list of cmsdk_mcu.v, and there are CPU options which defines the CPU's feature. I configured...
  • Hard Fault on Cortex M0
    I am using a nRF51422 from Nordic Semiconductor with has an ARM Cortex M0 CPU. While trying to use their Bluetooth Mesh SDK I get a Hard Fault. I am trying to debug the example code to figure out...