• Interruptible-restartable instructions and Others
    Hi, As I have found in: Cortex-M0+ Devices Generic User Guide: 2.1.3. Core registers There is information about instruction behaviour during interrupts: "Interruptible-restartable instructions The interruptible...
  • Usage of generic register in CPU reset
    Hi All, Could anyone please tell me which generic register/location in memory can be used for storing a bit value which will not get reset after a CPU reset? I need the register to hold the value after...
  • Does "LDRD" instruction cause "UNDEFINSTR" error on Cortex-M4?
    Dear Experts, I'm working on a freertos project which is running at Cortex-M4 and I'm being troubled by a problme - hard fault. The following is my debugging process: I dump the registers in the...
  • Core_n System Timer reset behaviour
    Hello, I'm working with i.MX8DX (Dual Core CortexA35) My question is this: If a PE is reset. Is the CNTPCT_EL0 is also reset and start from 0? or keep counting normally?
  • Micro controller getting reseted periodically.
    Hi, I am using Nuvoton M058LBN. In my code, my while 1 there are some functions which should run continuously. But it was getting reseted . So for checking I printed some statement which is getting...