• Why does Arm still support short descriptors?
    What I'm asking is ARM Architecture Reference Manual for ARMv8-A says in AArch32 there are two translation table formats: Short descriptors: 32 bit Long descriptors: 64 bit On page G4-4726...
  • SMC flow on ARMv8
    Hi everyone, Wherever I go on internet, the thing I read is that when SMC instruction is executed an exception is generated, it takes you to the highest exception level (EL3) where secure monitor is...
  • How to ensure the safety of SP_EL0
    Hi experts, In ARMv8, EL1/2/3 can use either their own stack pointer, SP_ELx or SP_EL0. SP_EL0 can be used in EL0. why it is safe to use SP_EL0 in EL1/2/3? I think the applications in EL0 may...
  • How can I trigger an SError exception on a cortex A processor
    Is there a reproducible way of intentionnaly triggering a SError on a cortex A implementation (CortexA53 for example), I need this to implement handlers for different errors and I need this to test my...
  • The "usage model" of ARMv8 SVE contiguous "non-fault" load instructions ?
    Hello, What exactly is the "usage model" of ARMv8 SVE contiguous "non-fault" load instructions ? I understand the usage model of "first-fault" SVE instrcutions (which is described in many white papers...