• Cortex M7 D cache activated without MPU been enabled
    Hi, I have question related to cortex M7 cache behavior. I noticed that whenever the MPU is disabled after power on reset then I activate data cache I get a hardfault (data cache is already invalidated...
  • MPU
    Hi Using STM32f4 Board, I am enabling MPU in between any code (simple program) always causing memory management fault on debugging fault that ( IACCVIOL) bit is set, It means Attempting...
  • Unexpected MPU fault
    Hello, I'm facing an unexpected issue while configuring the MPU on a Cortex-M7 (STM32H7). Basically, after setting the MPU in privileged thread mode, the execution continues up to when I switch to unprivileged...
  • MPU config and memory attributes
    I want config STM32F746 MPU , In the ARM Cortex M7 generic user guide External RAM memory region (0x60000000 - 0x7FFFFFFF)(512MByte) has WBWA (write back write allocate) cache policy see this link ...
  • Cortex-M MPU User access to privileged code
    Hi All, I currently want to make use of the MPU. I have several functions which are required to be in privileged mode and are stored in a region set as privileged-read-only, user denied, executable...