• Usage of generic register in CPU reset
    Hi All, Could anyone please tell me which generic register/location in memory can be used for storing a bit value which will not get reset after a CPU reset? I need the register to hold the value after...
  • Concurrent Interrupts
    Hi All, Im new to the Arm Community and Arm processors (newbie), and my question is as follows: Atmel ATSAMD20e  implements ARM cortex M0+ processor based on ARMv6 architecture. It allows upto 32 external...
  • Can I use EXEC_RETURN on M0 outside of an exeception for contect switches?
    I have initialized stacks for various tasks with content as expected on SVC interrupts.  I'm not able to dispatch an initial task via the "normal" dispatch function.  On this first dispatch, the processor...
  • cortex m0
    I need the ARMv6-M Architecture Reference Manual and ebrising abaut the cortex m0
  • Why thumb code can only access r0-r7?
    Hi Sir, I want to know why thumb code can only access r0-r7, which described in ATPCS? Thanks and best regards, Wenchuan