• Addressing memory question for Cortex-M3
    First I apologize if I am in the wrong place to ask this but can't find info anywhere or I just don't know what question to ask regarding memory address for the Cortex-M3. I am very new to microcontrollers...
  • Systick precision
    Hi all, To prove that my code was configuring the systick counter correctly, I did a small test. To measure the interval length between each SysTick interrupt handler I used SWV in combination with...
  • Shortest code for memory to memory transfer
    Note: This was originally posted on 16th March 2009 at http://forums.arm.com Hi All,     Can anyone tell me what is the shortest code I can use for cortex M3 to transfer (a few words) from one memory...
  • Normal Memory ordering & precise state question
    From the ARMv8 spec, section K11.6 there is a discussion of the issues that arise from normal memory being weakly ordered. It's clear that without a DMB in both parts of the code, P2 can see either the...
  • INVPC Hard fault exception error
    Note: This was originally posted on 16th July 2009 at http://forums.arm.com Using and Arm Cortex M3, the application that is running sometimes will generate a hard fault and deciphering the CFSR register...