• Disabling the MMU
    Hello everybody! I am working on a IMX-6 and i have a little problem with the MMU. I want to write on some registers which are blocked by the MMU, so i want to disable it. I went on this page ARM Information...
  • Secure world memory access with MMU disabled
    Hi, I am a newbie to the TrustZone architecture. I learned that, in secure world, whether a memory access is secure or not is determined by the NS field in the translation descriptor and, in non-secure...
  • Enable and disable MMU page table caching in L2
    Hello, I am using a dual core Cortex A9 CPU and I want to enable MMU caching in L2. By default all the DDR memory region is set as non-cacheable. But then I want only the DDR regions allocated...
  • A8: Keeping Cache-enabled and MMU-disabled
    Hi all, A Question about the A8 processor. If I enable the L1 and L2 caches, I see a performance boost even if the MMU is disabled. I was under the impression that the MMU is required to be enabled...
  • Need help to decide on which ARM board to go for?
    How do I decide which ARM board to go for if I am aiming to use it as a micro-controller to run sensors, actuators, motors, and solar panels? And I wish to power up the board via Li-ion battery pack....