• Aarch64 llvm unrecognized instruction mnemonic
    I am trying to use ARM inline assembly in a C code. I am compiling using aarch64-linux-android-clang version 3.8.243773, the 64 bit llvm toolchain from Android NDK R11. The inline assembly code is as...
  • Does MSR DAIF require ISB instruction? If no, why?
    Dear experts, I see a lot of code in opensource like .macro disable_daif msr daifset, #0xf .endm and it doesn't apply ISB instruction after it. Though I read in ARM manual that: "context-changing...
  • Unknown instruction jump
    Hi, I try to run the following code with a Cortex-A8 processor: asmfunc1: CMP r1, #0 ; Compare r1 to zero. BCS $1 ; If carry is set, branch to $1; ADDS r0, r0, #1 ; else increment to r0 MOVCS pc, lr ;...
  • Where can I find "ARMv8 Instruction Set Overview" (PRD03-GENC-010197)
    I am trying to prepare a guide for people that want to start programming in A64 assembly and I think the document would be a nice resource. It is mentioned in multiple places like here on developer.arm...
  • Bus error while executing ARMv8 TLB instruction
    Hi, I am facing "Bus error on memory operation" while executing below instruction while invalidating and flushing the TLB. I am not able to understand what is the reason for "Bus error" as it is a TLB...