• How to make ARM core hung
    Hello All/ARM, I would like to know if there is any way of process to hang a specific core for certain duration of time? Either from Kernel/User space? Also i have trying to understand if that is possible...
  • How to Design secure boot on ARM based SoC?
    I have started working on TI's ARM based Soc and wanted to know how to design secure boot ? Is implementation of Secure boot is part of first stage boot-loader Rom boot loader ? I have gone through the...
  • Disabling L2 cache for CPU1 (Zynq-7000)
    Hello people, we are trying to make AMP application on Zynq 7000 custom board. We have a FreeRTOS v8.2.3 and lwIP v1.4.1 running on CPU0, while baremetal application is running on CPU1 and this one...
  • CPI for ARM V-7
    Hi All, I could understand the difference in ARM V-7 processor differences between A/R/M. But does the clock cycle per instruction value for the various series of processors (A/R/M) remains the same or...
  • Arm v7 SP in secure and non secure mode : shared or not ?
    Hello, Mode have their own stack on this chip, but it's not clear to me whether , let say secure supervisor and non secure supervisor share a common stack or they need their own one ? (same for all...