• Cortex M3 : what determines the cycle count for a variable cycle count instruction?
    I have looked at the cycle counts for the Cortex M3 instructions at http://infocenter.arm.com/help/topic/com.arm.doc.100165_0201_00_en/ric1414056333562.html . Some instructions are listed as taking a...
  • Performance effect because of removing some instructions from ARMv8?
    I was going through the ARMv8 Architecture Reference Manual and I came to know that it does not support many instructions that were previously supported by ARMv7 architecture. For example ARMv8 does not...
  • What does the word UNPREDICTABLE exactly mean and what is its effect on the system?
    Hi, In many of ARM documentation result of operations are reported as unpredictable in some situations. For example, "If the system includes the Security Extensions, accesses to CNTVOFF from Secure Monitor...
  • Cortex-M0: What's included in the binary?
    Hi, I have two M0 projects.  The first project has only one assembly file startup.s.  The second project has one assembly file and one C file.  When I checked the memory map file of the second project...
  • page table Cachability bit effect!
    Hi experts, I really get confused with the page table cachability bit (c bit) effect (Cortex-A8) and need your help to find answer of my question. The questions is whether page table C-bit only controls...