• Cortex-A7 4 Cores Boot
    Hi , I am working on Arm for the first time . I am trying to implement a scenario to boot 4 cores parallel . I have few queries here      --> Reset lifting procedure for 4 cores ? how exactly they should...
  • multi core programming
    hi I have four functions and I am using cortex a7 processor. I want every core to execute one function. so to achieve this which registers and which manual and section should I refer too. i have placed...
  • Quad-Core Cortex A7 / MSDOS comparability
    I just bought a Samsung SM-T560 (WiFi) SM-T561 (3G & WiFi) with a 1.3GHz: Quad-Core Cortex A7. I know nothing about processors but in searching the Internet I have found some applications that will allow...
  • AM3352 core hang-up
    Hello, We are encountering the core hang-up of unknown origin in our mass-produced board using TI's AM3352 and Linux Kernel 3.13.4. Regarding the reproducibility of the test, some units had the hang...
  • Cortex-A8 Pipelined cache maintenance
    Hi, I am new to the Cortex-A8, I would like to know what is the advantages of using "pipelined cache maintenance operations". "Auxiliary Control Register " has the "Cache maintenance pipeline" bit enabled...