• Cortex-A5 Evaluation boards
    Note: This was originally posted on 26th July 2011 at http://forums.arm.com Hi All,   Is there any evaluation boards available in the market for cortex A-5 ?.  I would like to evaluate    A-5 performance...
  • I am looking for intro material ARMv7
    Hello, I am trying to learn how to use the device, not the innermost working of the VSLI design. :-) I am consulting the Reference Manuals, but they are proving to be a challenge. Please let me give...
  • Cortex A8 PLD
    Good morning, I'm studying ARM assembly, Cortex A series. Reading the ARM documentation I found out this paper (Cortex A8, fast memcpy examples). My attention went to the PDL instruction, preloading...
  • "CPSIE I"on an ARMv7A not changing the I bit in the CPSR register in USR mode - why?
    I'm using a CortexA8 and I can't seem to enable interrupts...! I'm using a "CPSIE I" instruction, I can see that the compiler (GCC) is not optimizing my code out... I have to manually stop the program...
  • ARM Cortex A8 L2 Cache Flush Invalidate
    Hi, I am working on DM37xevm platform and already invalidate the L2 cache (256KB) using the code asm volatile moveq r12, #0x1");                                                  asm volatile ("smc #1...