• How to Write CP15 registers (CRn:C15) in Non-Secure mode
    Some of the Cortex-A8 registers like CP15 registers (CRn:C15) are writeable only in secure mode. How to write these registers when the CPU is in Non-Secure mode? Please let me know if there is any reference...
  • How to start ARM Programming???
    Dear All, I am new to Arm Processors, I don't know how to start Arm Programming and Application development, can anybody help me? I have working experience on DSP Processor, and Microcontroller, which...
  • Cortex-A8 performance
    I'm working an a project on a Texas Instruments AM3517 Cortex-A8 processor. I was seeing less than expected performance, and did a simple comparison with a Cortex-M3 processor. The M3 performance was...
  • A8: Keeping Cache-enabled and MMU-disabled
    Hi all, A Question about the A8 processor. If I enable the L1 and L2 caches, I see a performance boost even if the MMU is disabled. I was under the impression that the MMU is required to be enabled...
  • Event counters take differing number of cycles
    We have some code that sets up various event counters and reads them.  We bracket this code with reads of the cycle counter.  We have noticed that depending on what event counter we are configuring, we...