• If the mispredict happen, is there a mechanism to abort the instructions(have been fetched or decoded)?
    If the mispredict happen, is there a mechanism to abort the instructions(have been fetched or decoded)? If there is the mechanism, how does it work? Thanks very much!
  • A53 preload mechanism
    Hi, I am reading the A53 MP Core doc. My question is related to instruction preloading in aarch64. In case of a very large block of code with no function calls, I want to make sure the L1 cache...
  • How to use generic timer/counter
    The technical reference manual states that the Cortex-A57 generic timer events are not affected by CPU clock frequency change. My challenge is that I can't use any built in linux libraries to create a...
  • Does E0PD mechanism provide Meltdown mitigation?
    ARMv8.5 introduces E0PD mechanism that changes faults timing (as declared in spec). Other side, there is a patch to Linux kernel that disables KPTI if cores support E0PD. From description in spec it's...
  • Why does the ARM A15 processor have so many DVFS levels ?
    For eg. the A15 on the Samsung Exynos 5422 has around 19 DVFS levels which varies frequencies from 200MHz to 2GHz.