• Zeroise complete L1 and L2 caches in ARM v8?
    Hi All, my situation is, I have to zeroize complete caches in ARM-v8 (Xilinx Ultrascale+ Device). Zeroise or set every line to constant values. Does anybody know how can I solve this? Thanks in...
  • What is the PMU counter resolution when the processor switches between 64-bit and 32-bit mode?
    Hi experts, The PMU counter value is mentioned as 64 bit in ARMV8 manual. What is the PMU counter resolution when the processor switches between 64 bit and 32 bit mode
  • Announcing VIXL: A Dynamic Code Generation Toolkit for ARMv8
    This content was initially posted 10 July 2013 on blogs.arm.com We are pleased to announce the release of VIXL, a dynamic code generation toolkit for ARMv8 that we hope will enable JIT creators to rapidly...
  • Technical questions about the Juno Development Board
    I am interested in buying a Juno development board, but have a set of technical questions related to the platform, namely:    (1) What are the migration modes that are available on the ARMv8 big.LITTLE...
  • PoU (Point of Unification)
    Hi all, When reading the ARMv8 reference manual, it mentions a concept of PoU. My understanding is that, if the every CPU core in a cluster has its own L1 cache, and all clusters share an L2 cache...