• Cortex-A8 - accessing banked registers from monitor mode
    Note: This was originally posted on 20th March 2012 at http://forums.arm.com Hi Group, I am working on a Cortex A-8 Processor (ARMv7-a architecture). I am in the monitor mode and trying to access SP of...
  • Cortex-A15 MPCore: How to Enable Monitor Debug Mode
    Hi experts, I want to enable monitor debug mode for Cortex-A15 MPCore. I tried modifying DSCR[15] bit but watchpoint event still won't generate exception/abort. Core was in no-debug mode before modifying...
  • Use keil5 to compile AM335X
    Can I use AM335X to compile TI AM335X(CORTEX-A8)?
  • A8: Keeping Cache-enabled and MMU-disabled
    Hi all, A Question about the A8 processor. If I enable the L1 and L2 caches, I see a performance boost even if the MMU is disabled. I was under the impression that the MMU is required to be enabled...
  • Monitor Mode Debug
    I asked this a while back on the old Keil forum, but got no reply. https://community.arm.com/developer/tools-software/tools/f/keil-forum/35230/is-monitor-mode-debug-mmd-supported-with-ulink So perhaps...