• ARM926ejs Cache linefill
  • Cache maintenance and DMA
    Greetings ARM community, I have been tasked with cache maintenance.  The necessity popped up because of DMA issues on USB. As a quick (not perm solution) I used the invalidate all routine.  While obviously...
  • Development Board with Trace Options
    Hello All, We've been looking for a development/evaluation board for project with a Cortex-M processor that has also the Trace option (MTB or ETM). It can be M0+, M23, M3, M4, M33, M35 etc.. What we...
  • Break point at SWI handler
    Hi everyone, I'm using Jlink with openocd to debug ARM926EJ-S and encountered problem when executing SWI command. Even though I don't set a break point at SWI handler but the CPU breaks at SWI handler...
  • ARM9 Frequency scaling
    Hello, I am currently working on a ARM9 based System on Chip. I would like to experiment with Frequency scaling on the CPU, but I have the following issue: The main PLL is used at the same time by an...