• Issue with ARM926EJS uboot relocation to DDR
    Hi All, I'm new to Uboot and has experience in bringing up VxWorks BSPs. I am working on developing support for a new SOC in Uboot. The SOC has an arm926ej-s based core and is implemented on Xilinx...
  • SOFT Reset hangs sometimes in ARM926ej
    Hi, I am working on PC205 having ARM926ej as a processor in it along with DSPs included in it. Now, I am facing an issue regarding SOFTWARE REBOOT/RESET of the ARM processor as i don't have any WATCHDOG...
  • How to force ARM core into debug state when DBGEN was tied LOW?
    Note: This was originally posted on 11th January 2009 at http://forums.arm.com [size=3][font="Courier New"] Hello,     After our SoC(ARM926EJ-S inside) was mounted on our development board, ARM Multi...
  • Setting up TCM Memory in ARM926EJ-S
    Note: This was originally posted on 20th October 2008 at http://forums.arm.com Hi all, I am currently trying to turn on TCM in ARM926EJ-S where there is 64K for ITCM, DTCM and internal SRAM. I have decided...
  • Break point at SWI handler
    Hi everyone, I'm using Jlink with openocd to debug ARM926EJ-S and encountered problem when executing SWI command. Even though I don't set a break point at SWI handler but the CPU breaks at SWI handler...