• Allocating memory from heap from within a ISR on Cortex
    Is there is recommandations, hints on do-do-not-do when ISR requires to allocate dynamic memory?
  • Decoding the Startup file for Arm Cortex-M4
    Introduction This is my attempt to understand the startup file for an Arm Cortex M4 processor, specifically the STM32F4 (Cortex M4) processor. This document should help in giving a feel of assembly...
  • Cortex M4: Atomic and Cache
    Hello all, Recently I came across this issue for the cortex M4 core. We are running a freertos application which loads and stores the value of a variable. For this we are using the atomic functions...
  • Cortex-M4 documentation
    hi, im a total noob here so do excuse if im asking some weird question. im using an arm cortex m4f for the first time ... i looked online and i was able to find the TRM for the arm cortex m4f. however...
  • RNG (Random) on Cortex-M4
    Many implementations on Cortex requires true random number generation. It is very common to use seed based on the tick counter and then rand() function which is "just" a constant fixed known function...