• Reduce ARM CM0+ scatter initialization during boot?
    We are using ARM CM0+ in our embedded SoC design and I noticed that boot takes a long time. Specifically, I saw that it took ~18K cycles after the unreset before we executed an instruction that I recognize...
  • cortex-m0 address branching from ROM to RAM
    I'm designing a MCU platform that is using ROM and RAM. My boot up scenario is as follows. First, ROM F/W is executed after power up(ROM F/W is excecuted only 1 time). And then, core waits for...
  • How does the memory regions are mapped in A72 cortex?
    Hello, I am new to this ARM platform. I would like to know the memory regions mapped in A72. Say Cache, RAM, Peripheral, DRAM starting and ending address details. Could any one share some information...
  • Addressing memory question for Cortex-M3
    First I apologize if I am in the wrong place to ask this but can't find info anywhere or I just don't know what question to ask regarding memory address for the Cortex-M3. I am very new to microcontrollers...
  • Boot sequence and secure boot
    Hi, I'm using SAM L11 which is based on Cortex-M23. I have difficulties understanding the boot sequence and have the following questions. 1. The software bootloader is stored in the BOOT region (B_S...