• Saving processor state for power-down and resume
    I'm working on a SoC that can power-off the ARM (Cortex-M4) while retaining the system RAM, and I'm interested in saving the processor state then restoring it when the ARM is restarted. So prior to power...
  • Cortex M4 - Returning from Interrupt
    Hi, I'm using the STM32 F407 (Cortex M4), and I am also only using assembly in uVision IDE. So far I have managed to setup a ISR for a pushbutton generated interrupt via GPIO. This all works, I get...
  • How to acknowledge/clear active interrupt in Cortex-M4
    Hi all, I'm testing interrupt on a Cortex-M4 based platform. So far I have managed to get my interrupt handler called. It clears the interrupt source coming from the peripheral. But before the pin to...
  • Interruptible Instructions on Cortex-M4
    The ARM Cortex-M4 Processor Technical Reference Manual states: To minimize interrupt latency, the processor abandons any divide instruction to take any pending interrupt. On return from the interrupt...
  • SMP to suspend an individual core with security OS
    Hi All, a SMP architecture, like CA53-4core-mp, with a secure OS running at aa32 secure state. how to implement a suspend/resume flow on a individual core? TRM only mentions about how to clean...