• xPSR change itself when branching
    I am writing an embedded operating system targeting arm cortexm 4... I am working on context switching .. I can switch the kernel into user program and go back. but SVC call seems not work well. syscall...
  • Cortex M4 Conditional Branch - Pipeline
    Hello all! So I'm working on a development with a Cortex M4 and there is something i don't understand, I was hoping someone could help clarify this: This is the code I' using (Assume R3 content...
  • How the current consumption is affected by instruction address
    Hello to all, I am willing to know the variation in the current consumption due to the instruction address. Therefore I have performed two experiments, first time filled the pipeline with a 32-bit instruction...
  • How to get to know the exact instruction address or find the instruction address for least current consumption?
    Hello to all, In order to measure the current variation due to instruction address location. I filled the memory with NOP instructions and tried to observe the variation in the current consumption due...
  • cortex-m0 address branching from ROM to RAM
    I'm designing a MCU platform that is using ROM and RAM. My boot up scenario is as follows. First, ROM F/W is executed after power up(ROM F/W is excecuted only 1 time). And then, core waits for...