• Question is on WIC-CM4 interface
    Hi, Assume system configuration is: CM4 in a switchable power domain and WIC in always on domain. Also in response to "seeldeep" if the power management unit is powering down the CM4 and with no logic...
  • CM4: Is DAP immune to MPU protections?
    Can the DAP cause exceptions by performing illegal instruction in spaces protected by MPU or is it immune? Trying my hand at setting up MPU but I cannot get it to fire - thought it might not be possible...
  • CM4: Write buffer with enabled MPU
    Hello, I have a question regarding Memory protection unit on Cortex M4 (STM32F3 MCU). This is pretty simple single core MCU without caches. I implemented MPU based on instructions in Definitive guide...
  • Parallelism between CPU and FPU
    Hi. I have a question regarding Cortex-M4 processor with floating point unit. Is it somehow possible to do some computation in parallel in CPU (with integers) and FPU (with floats)? Probably not, because...
  • CM4: Can processor halt itself by writing DHCSR
    Hello, As part of my diagnostic regime I wanted the diag to halt when completed. It doesn't seem like it can. It seems to keep running when I CoreDebug->DHCSR = (0xA05FUL << CoreDebug_DHCSR_DBGKEY_Pos...