• Cortex M4 exception return sequence
    Hi, I think I am just getting confused with this even if (or because of) I read the book and manuals again and again. At exception entry, the processor saves R0-R3, R12, LR, PC and PSR on the stack. Saving...
  • SVCall returning to 0xdeadbeee
    Hi, I am developing for an ARM Cortex-M7 core (NXP iMIMXRT1062 chip), which is a Thumb only processor. I am using MCUXpressoIDE 11.1 which is based on Eclipse. I have a problem returning from SVCall...
  • How to calculate the return address of an exception?
    I'm researching the the <Arm Architecture Reference Mannual ARMv7-A ARMv7-R edition> these days. when i read about the exception handling part of this mannual,it come accross a confussion to me,the problem...
  • Cortex-M7 minimum schematic ?
    I'm looking to start a new design based on the ARM Cortex-M7 and have been reading thousands of pages of documentation ( not done yet of course ). I am able to design my own schematics and PCBs so I'm...
  • Cortex-M MPU limitations
    Hi All, The title may seem a bit negative, just from my personal point of view. What is the main reason of the two requirements of setting up MPU, namely size and start addresses of MPU regions. First...