• GICv2 initialization for Non-Secure World
    Hi, Recently I am working on porting our Cortex A7 code that used to run in secure world to non-secure world for some reason. I got a problem when it came to GIC initialization. I noticed that in order...
  • QEMU GICV2 Virtual Interface Alias
    I'm trying to run my hypervisor on qemu virt. Gicv2 specification describes a mandatory global alias region through which any virtual interface can be accessed by any cpu. Looking through qemu code at...
  • GIC order of completion of interrupts
    Hello, Reading the "ARM® Generic Interrupt Controller Architecture version 1.0 Architecture Specification" I read that "For nested interrupts, the order of interrupt completion must be the reverse of...
  • Is it possible the direct device's interrupt assignment to the guest OS instead of being routed by the hypervisor to the guest OS?
    Hi everyone, I'm currently working with devices virtualization and I have noticed on my experiments that one of the most sources of overhead comes from the device's interrupts, even if the guest OS...
  • Virtual Interrupts and usage in ARM V8
    Hi Experts, What is the practical usage of the ARM v8 virtual interrupts ? How it helps in the performance of functionality ?