• Transition to secure monitor flow on ARMv8
    Hi everyone, Wherever I go on internet, the thing I read is that when SMC instruction is executed an exception is generated, it takes you to the highest exception level (EL3) where secure monitor is...
  • SMC flow on ARMv8
    Hi everyone, Wherever I go on internet, the thing I read is that when SMC instruction is executed an exception is generated, it takes you to the highest exception level (EL3) where secure monitor is...
  • Security State transitions - Processor Mode
    Edit: CONTROL.nPRIV is actually banked so I modified my question Hi, I have a question regarding S/NS state transitions and PE modes. From what I read in the ARMv8-M ARM there is no restriction...
  • How to do from Secure(EL3) to Non-secure Exception level transition in ARMV8-A ?
    Hi all i trying do transition from EL3 to EL2 exception ,but after ERET of EL3 mode it change the mode to EL2 , but as soon as when it will execute first instruction of EL2 , then It goes to Exception...
  • How to know if the processor is in EL0 state on armv8?
    Hi Fellows, I want to determine in code, if the processor is in EL0 mode or not. I read CurrentEL register to do this but if my code is running from EL0, it throws an exception since we can't access...