• SMP to suspend an individual core with security OS
    Hi All, a SMP architecture, like CA53-4core-mp, with a secure OS running at aa32 secure state. how to implement a suspend/resume flow on a individual core? TRM only mentions about how to clean...
  • AM3352 core hang-up
    Hello, We are encountering the core hang-up of unknown origin in our mass-produced board using TI's AM3352 and Linux Kernel 3.13.4. Regarding the reproducibility of the test, some units had the hang...
  • Cortex-A9 core registers
    In RTL code of A9mp platform provided by ARM, I see that almost all registers are renamed and are out of order(There are registers named R0-R55). This make it quite difficult for me to debug some problems...
  • cortex A9 multi-core
    I'm learning cortex-a9 on freescale imx6 platform. How to start multi-core? And how to communicate between cores? I'm confused.
  • Multicore SMP using Linux kernel
    Hi, I am just trying to learn the linux kernel booting process for arm32 Cortex A9 multi core SOC. I had understood the concept of booting in linux, but I am confused about the section where secondary...