• GIC order of completion of interrupts
    Hello, Reading the "ARM® Generic Interrupt Controller Architecture version 1.0 Architecture Specification" I read that "For nested interrupts, the order of interrupt completion must be the reverse of...
  • Cortex-A5 Evaluation boards
    Note: This was originally posted on 26th July 2011 at http://forums.arm.com Hi All,   Is there any evaluation boards available in the market for cortex A-5 ?.  I would like to evaluate    A-5 performance...
  • Cortex-A5 area measurement with and without FPU
    Hello, I need to know the area of cortex-a5 with and without FPU. Or I need to know the area of FPU in arm. Thanks.
  • GIC-400 controller virtual interrupt handling in VM and hypervisor
    Hi, I am new to ARM architecture and as of now exploring GIC Controller GIC-400 and using ARM Cortex a57. Sorry for asking very fundamental flow of interrupts handling GIC-Virtual extension Let assume...
  • Is it possible the direct device's interrupt assignment to the guest OS instead of being routed by the hypervisor to the guest OS?
    Hi everyone, I'm currently working with devices virtualization and I have noticed on my experiments that one of the most sources of overhead comes from the device's interrupts, even if the guest OS...