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    hi,      I'm studying Cortex-A53 cache process. I run the following cache invalid program, but the result is cache not invalid.      Could you give me any suggestion about cache invalid? Thanks!     ...
  • Clean Whole Cache on Cortex-A9
    I am doing some benchmarking and I need to clear the cache before each test. I have this example here: Caches and Self-Modifying Code However, I just want to clean the whole cache. Is there an easy way...
  • Cache cleaning and invalidating in ARM Cortex-A
    Cleaning or invalidating the L1 cache and L2 cache will not be a single atomic operation. A core might therefore perform cache maintenance on a particular address in both L1 and L2 caches only as two...
  • ARM Cortex A9 - Enabling/Disabling the Caches
    Hello, I'm developing a custom bootloader for NXP i.MX6 DualLite (ARM Cortex A9). In this bootloader, I need to initialize ~50 MB of RAM to Zeros, this part executes really fast after enabling Caches...