• GICv3 Group0 secure interrupts routed to monitor when running in S-EL1
    Hi, In a GICv3 based system, is it possible to have the following configuration: While running NS-EL1/EL0: -NS Group1 interrupts triggered as IRQ to NS-EL1 -Secure Grp1 interrupts routed as FIQ...
  • ELn configuration in ARMV8
    Hi Experts, Does the EL3 and EL2 usage is the purely implementation specific or even though EL3 is implemented is it possible to disable EL3 and EL2 in software ? Regards, Techguyz
  • how to understand ARMv8 exception level1 secure/non-secure MMU?
    Hi Experts ,      ARMv8 MMU TTBRn_ELx registers are banked by exception level.      In "DDI0487A_b_armv8_arm.pdf" page 1640, the controlling register of secure EL1&0 stage1 is TTBR0_EL1      and Non-secure...
  • What are the necessary preconditions to load a guest into EL1 from EL2?
    I have successfully moved from EL3 to EL2. After doing some initialization I am trying to move from EL2 into EL1 with a very simple guest image. My process looks like: Map EL1 memory into EL2 ...
  • ARMv8 EL1 MMU
    Hi,     I am working on bootloader porting to ARM v8 platform. I am facing a problem in enabling MMU in execution level-1 EL1. I am not able to set sctlr_el1.M bit when ever i try to set this bit the...