• Clean Whole Cache on Cortex-A9
    I am doing some benchmarking and I need to clear the cache before each test. I have this example here: Caches and Self-Modifying Code However, I just want to clean the whole cache. Is there an easy way...
  • De-merits in using Cortex A9 for single core processor
    Hi Experts, A8 is meant for single core and A9 is for multi-core based. Consider in case of SoC is build with single core of A9 and A8 how we could compare both in terms of some metrics/parameters like...
  • ARMv7 CortexA9 Cache Policy - No allocate ?
    I was wondering if it would be possible to configure cache policy in the page table entry (short descriptor format) in such a way that the cache is used only if the data already exists in the cache? A...
  • Data synchronization Barrier and cache.
    Hi, everybody. I have system based on multiprocessors system with ARMv7-A. I need copy table from one point of memory to another. I use for this task DMA. Memory attribute is write-back cacheable. Before...
  • About PL310 cache controller and data aborts
    Hello All, I am working on a automotive product based on i.MX6q and recently facing an issue where we see kernel error with message "imprecise external abort". I am trying to analyze it and need to know...