• Does ARM have a time counter mechanism?
    Say, like Time Stamp Counter of x86, or Time Base of PowerPC, which can used to do some performance profiling.
  • A53 preload mechanism
    Hi, I am reading the A53 MP Core doc. My question is related to instruction preloading in aarch64. In case of a very large block of code with no function calls, I want to make sure the L1 cache...
  • In aarch32 state, what is the mechanism to switch to aarch64 in software?
    Dear sirs, I'm reading arm v8a specification. I found that when arm is in aarch32 state, only a few exceptions can switch to aarch64 depending on the configuration in the registers. the exceptions are...
  • Is it possible to enable or disable the nested interrupt mechanism on M0 ?
    Hi all, Is it possible to enable or disable the nested interrupt mechanism on M0 ? Thanks a lot. BR, Eddie
  • Arm partnership providing the foundation for next generation networks
    Authors: Jim Wallace, Arm; Joseph Byrne, NXP Service providers or anyone involved in building out next-generation networks are faced with complex challenges today as they seek to evolve, future-proof...