• Reordering between multiple loads
    Hello, I have a question if following sequence of instructions involving post-indexed LDRs could be re-ordered on say Cortex A8: To simplify, lets consider, r0 = 0xC, Cache line size 16 Bytes ldr    ...
  • Pipeline and Reorder Buffer on Cortex A9
    Hi everyone, For research reasons, I'm looking for information about the Cortex A9 out-of-order pipeline and the renaming of registries and any other data structures, if any, such as the reorder buffer...
  • how does ARMv8 switch to run application(EL0) from kernel(EL1)?
    hi experts, I am studying the ARMv8 exception levels. I have a question about ELs. EL1 is described to run OS kernel and EL0 is application level.    The exception levels change only occur on exception...
  • Exceptions levels in the ARMv8 architecture
    Hello There are four exceptions levels in the ARMv8 architecture. EL0 EL1 EL2 EL3 Can anyone explain more of the EL3 execption level? What does it mean by 'allows swtiching between secure and nonsecure...
  • Cryptography instructions sample for ARMv8
    hi, experts: I found ARMv8 supported some cryptography instructions. So: Is there any sample code demonstrating how to use these crypto instructions? best wishes,