• How to access the system control register?
    Hi all, I am trying to access the system control register in my ARM C program. The code (with heading 64 bit) I used is presented below. However I got the following error message during compilation. ...
  • Armv8 Memory Mapping
    I am looking to emulate an Apple II and would like to specify some address ranges as being memory mapped so that any access would result in perhaps an interrupt that I am then able to handle and in which...
  • Barriers in in-order cores like cortex-A53, A7
    Hi experts! As you know, power efficient arm like cortexA7, A53 has in-order pipleline. However as far as I understanding, Barriers like dmb, dsb, isb are related with out-of-order memory access. But...
  • Memory barrier when accessing strongly ordered memory
    Hello, From the armv7 architecture, it mentions that all memory accesses to strongly-ordered memory occur in program order. When switching from accessing the normal memory to strongly ordered memory...
  • AARCH64 banked registers
    I am failing at searches can someone point me to a reference for the banked registers for an FIQ in AARCH64 on a cortexA53 I can find hundreds of references for AARCH32 banked registers but none for...