• GIC order of completion of interrupts
    Hello, Reading the "ARM® Generic Interrupt Controller Architecture version 1.0 Architecture Specification" I read that "For nested interrupts, the order of interrupt completion must be the reverse of...
  • Is it possible the direct device's interrupt assignment to the guest OS instead of being routed by the hypervisor to the guest OS?
    Hi everyone, I'm currently working with devices virtualization and I have noticed on my experiments that one of the most sources of overhead comes from the device's interrupts, even if the guest OS...
  • Virtualizing GICv2.
    Hi all, I'm currently virtualizing the GICv2 and some doubts came out during its design. Scenario encompasses the same instance of an hypervisor running in two different CPUs (CPU0 and CPU1). Also,...
  • Virtual Interrupts and usage in ARM V8
    Hi Experts, What is the practical usage of the ARM v8 virtual interrupts ? How it helps in the performance of functionality ?
  • Type 2 Hypervisor with Hardware Assisted Virtualization as Cortex A15
    Respected Experts,                               I would like to know that is it possible to get the advantage of Hardware Asssited Virtualization to develop a Type 2 Hypervisor which runs on an OS, and...