• unaligned transfers
    Hi all i have some questions. Q1 if the master write a burst started in unaligned address. How to know the slave support unaligned transfers or not? Q2 AXI spec mention that the AXI protocol...
  • AMBA AXI :Unaligned "INCR" data transfer
    Hi,     i am confusing in the following point ,with an example....    if      Start_Address = 23      Number_Bytes = 8      Burst_Length   = 8      data_Bus_Byte =4 1.How many data transfer required to...
  • Use-cases of AXI3 unaligned transfers
    Hi all, I cannot think of a good usecase of unaligned transfers in AXI3. - For unaligned write, a master can anyway use aligned write + write strobes. - For unaligned read, a master can use aligned...
  • Supported AXI transfers on Cortex-A9?
    Hi folks, The technical reference states that only a subset of possible AXI transactions are actually generated. This is described in http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0388f...
  • AXI narrow transfers
    I would appreciate assistance on the following: Suppose a bus master with 128bit data width. This master access a 64bit slave via AXI matrix as follows: awaddr = 0x4000_909F awsize = 0x0 (8bit write)...